In recent years, a NAND type flash memory has been installed in a memory card, a solid state disk, or the like, and the demand of the flash memory has been increased from year to year. For the NAND type flash memory, the operations in data read and in data write are controlled by a memory controller. A memory controller that is provided with an error correction circuit (ECC circuit) adds the redundant information to data that has been input from a host apparatus and stores that data into the NAND type flash memory in a write of data (see Patent Literature 1 and Patent Literature 2). The memory controller reads data and the redundant information from the NAND type flash memory, detects an error point (an address for instance), and corrects an error of data in a read of data.
The data that is stored into a storage region of the NAND type flash memory is configured by a plurality of blocks. The data of each block is configured by a plurality of pages. For the NAND type flash memory, a write of data and a read of data are executed in a unit of a page. Moreover, for the NAND type flash memory, data is erased in a unit of a block.
The data of one page is divided into a plurality of data that is called a code word. The redundant information for an error correction is added to each code word. A length of data that is input to the ECC circuit and the number of bits of the redundant information depend on the number of bits of code words that are obtained by dividing data of one page of the NAND type flash memory into some data. The number of bits of one page is specified by a data length that can be set to the NAND type flash memory.